In the development of cutting-edge CMOS (complementary MOS) devices for which smaller and smaller transistors are required, the deterioration of the driving current due to the depletion of polycrystalline silicon (poly-Si) electrodes is posing a problem. In view of this problem, a technique of preventing the deterioration of the driving current by applying metal gate electrodes and thereby avoiding the depletion of electrodes is being studied.
The materials considered for use for the metal gate electrodes include pure metals, metal nitrides and silicides, but in any case it is required that the threshold voltages (Vth) of the n-type MOSFET (hereinafter “nMOS”) and the p-type MOSFET (hereinafter “pMOS”) can be set to appropriate levels.
Whereas it is required to set Vth to about ±0.1 eV for high performance CMOS transistors, in order to meet this requirement it is necessary to use for the gate electrode a material of which the work function is not greater than that of n-type poly-Si (4.0 eV) for nMOS or one of which the work function is not smaller than that of p-type poly-Si (5.2 eV) for pMOS.
As means of realizing these objectives, a method of controlling the Vth of transistors by separately using heterogeneous metals or alloys having different work functions for the gate electrodes of nMOS and pMOS (dual metal gate technique) is proposed.
For instance, it is stated in Non-Patent Document 1 (International electron devices meeting technical digest 2002, p. 359) that the work functions of Ta and Ru formed on SiO2 are 4.125 eV and 4.95 eV, respectively, and work function modulation by 0.8 eV is possible between these two electrodes.
On the other hand, techniques regarding full silicide electrodes in which poly-Si is fully silicided with Ni, Hf, W or the like is now attracting attention.
For instance, Patent Document 1 (U.S. Patent Application Laid-Open No. 2005/0070062) discloses that, by using SiO2 as the gate insulating film and a silicide electrode obtained by full silicidation of poly-Si into which impurities including P and B have been implanted as the gate electrode, (1) the formation process can be made more compatible with conventional CMOS processes and (2) the threshold voltage can be controlled by adding impurities to poly-Si before silicidation over SiO2.
This disclosure suggests that the full silicide electrode is a promising metal gate. In particular, the threshold control made possible by adding impurities resulted in an effective work function of about 4.2 to 4.4 eV for nMOS or about 4.7 to 4.9 eV for pMOS where impurities used in conventional semiconductor processes (B, Al, Ga, In and Ti for pMOS or N, P, As, Sb and Bi for nMOS) were applied. Such variations in threshold occur from the segregation of the added impurities on the silicide electrode/SiO2 gate insulating film interface by the so-called “snowplowing” effect at the time of silicidation. As the threshold control by the addition of impurities enables differentiated production of pMOS and nMOS, it is considered a promising method for controlling the threshold of transistors using SiO2 as the gate insulating film.
Further, according to a technique described in Patent Document 2 (Japanese Patent Application Laid-Open No. 2005-129551), where gate electrodes have the Ni content of 30 to 60% and contain n-type impurities for nMOS and gate electrodes have the Ni content of 40 to 70% and contain p-type impurities for pMOS, effective work functions of about 4.1 eV and 5.1 eV have been obtained, respectively.
However, these techniques involve the following problems,
The dual metal gate technique for differentiated production of heterogeneous metals or alloys having different work functions requires a process for removing the metal layer deposited over either the pMOS or nMOS gate insulating film by etching, which deteriorates the quality of the gate insulating film during etching, thereby causing a drop in the performance characteristics and reliability of the element.
When an NiSi electrode (nickel monosilicide electrode) obtained by implanting an impurity such as P and B into poly-Si and fully siliciding the poly-Si with Ni is used as the gate electrode on the SiO2 gate insulating film, the effective work function achieved for nMOS is about 4.2 to 4.4 eV or the effective work function achieved for pMOS is about 4.7 to 4.9 eV, as described above, but realization of a high performance transistor requires achievement of a lower threshold by controlling the effective work function.
According to Patent Document 2, where gate electrodes have the Ni content of 30 to 60% and contain n-type impurities for nMOS and gate electrodes have the Ni content of 40 to 60% and contain p-type impurities for pMOS, effective work functions of about 4.1 eV and 5.1 eV are obtained, respectively. However, no Ni silicide electrode having effective work functions permitting achievement of a threshold required for realizing high performance nMOS and pMOS in this composition region (4.0 eV for nMOS and 5.2 eV for pMOS) has been discovered as yet.
As the tightness of adhesion between the gate electrode and SiO2 gate insulating film is very poor when the Ni content of the gate electrode is 40% or above, the gate electrode/insulating film interface is apt to come off, often causing a deterioration in element performance. Also, when the Ni content of the gate electrode is 40% or above, compressive stress attributable to the electrode is known to work on the gate insulating film and result in a drop in the reliability of the gate insulating film (International electron devices meeting technical digest 2005, p. 709). By reason of these points, it is preferable for the Ni content of the Ni silicide electrode to be less than 40%, but no Ni silicide electrode capable of realizing a threshold needed for high performance pMOS in this content region has been discovered as yet.
In fabricating a CMOS device, it is preferable for both nMOS and pMOS silicide electrodes to be formed in one round of silicidation with a view to cost reduction through simplification of the process. To achieve this purpose, it is necessary for the nMOS and pMOS Ni full silicide gate electrodes to have the same composition, but no Ni silicide electrode having effective work functions to permit realization of thresholds needed for a high performance CMOS device (4.0 eV for nMOS and 5.2 eV for pMOS), while the silicides that constitute the nMOS and pMOS gate electrodes have the same composition, has been discovered as yet.
It is also required, along with the miniaturization of elements, to restrain unevenness of the thresholds of transistors.